2024-02-27 12:12:18 +00:00
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//setup adc for an attiny85
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//
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#include<avr/io.h>
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#include"avr_adc.h"
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#define _BS(bit) (1<<bit)
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#define _BC(bit) ~(1<<bit)
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#define STARTADC ADCSRA |= _BS(ADSC)
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//1.setup_prescaler
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/* this function initialises the ADC
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ADC Prescaler Notes:
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--------------------
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ADC Prescaler needs to be set so that the ADC input frequency is between 50 - 200kHz.
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For more information, see table 17.5 "ADC Prescaler Selections" in
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chapter 17.13.2 "ADCSRA – ADC Control and Status Register A"
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(pages 140 and 141 on the complete ATtiny25/45/85 datasheet, Rev. 2586M–AVR–07/10)
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Valid prescaler values for various clock speeds
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Clock Available prescaler values
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---------------------------------------
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1 MHz 8 (125kHz), 16 (62.5kHz)
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4 MHz 32 (125kHz), 64 (62.5kHz)
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8 MHz 64 (125kHz), 128 (62.5kHz)
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16 MHz 128 (125kHz)
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Below example set prescaler to 128 for mcu running at 8MHz
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(check the datasheet for the proper bit values to set the prescaler)
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*/
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void setupADC(void)
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{
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ADMUX = //_BC(REFS0) | //Set_Vref
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//_BC(REFS1) | //Set_Vref
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//_BC(MUX3) | //
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//_BC(MUX2) | //
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2024-02-29 20:32:26 +00:00
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// _BS(MUX1) | //
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2024-02-27 12:12:18 +00:00
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_BS(MUX0) | //PORT Select PB3
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2024-02-29 20:32:26 +00:00
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_BS(ADLAR); //left shift conversion results(used in 8bit mode)
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// ADCSRB = _BS(
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2024-02-27 12:12:18 +00:00
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ADCSRA = _BS(ADEN) | //Enable ADC
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//_BC(ADATE) | //Disable AutoTrigger aka Freerunning mode
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2024-02-29 20:32:26 +00:00
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// _BS(ADPS1) | //Select Prescaler
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_BS(ADPS0) | //prescaler 128
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//_BS(ADPS1) |
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_BS(ADPS2);
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ADCSRA &= ~(1<<ADATE);
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2024-02-27 12:12:18 +00:00
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}
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