From 7ca98cc05e38f703666b67a9b66bf5b1ee87f08d Mon Sep 17 00:00:00 2001
From: Jonathan Wyss <j.wyss@kolabnow.ch>
Date: Tue, 5 Mar 2024 12:28:11 +0100
Subject: [PATCH] changed to Phase corect pwm because of not achieving 0percent
 dtc

---
 main.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/main.c b/main.c
index f0ca7a6..2817f07 100644
--- a/main.c
+++ b/main.c
@@ -29,18 +29,18 @@ int main (void) {            // (2)
 
 //#######OC0A auf ausgang
 	DDRB = (1 << PB0 )|(1<<PB1)|(1<<PB4);
-//#######Timer0-setup#####
-	TCCR0A = (1<<WGM01)|(1<<WGM00)|(1<<COM0A1)|(1<<COM0B1);	//mode
+//#######Timer0-setup#####			|Phase correct pwm
+	TCCR0A = (1<<COM0A1)|(1<<COM0B1)|(1<<WGM00);	//mode
 	TCCR0B = (1<<CS01);//|(1<<CS02);				//frequency /8
 //	PLLCSR |= (1 << PLLE) | (1 << PCKE);
 //######Timer1-setup
 
 	TCCR1 = (1<<COM0A0)|(1<<COM0A1)|(1<<COM0B0)|(1<<COM0B1)|(1<<CTC1)|(1<<CS12)|(1<<CS10);//|(1<<CS11)|(1<<CS13);	//frequencyi //iinverting PWM because 0 dtc not possible
-	GTCCR = (1<<PWM1B)|(1<<COM1B1)|(1<<COM1B0);				//mode + overrun clear, Set on compare match
+	GTCCR = (1<<PWM1B)|(1<<COM1B0);				//mode + overrun clear, Set on compare match
 	OCR1C = 255;						// clear timer at 255	
 //######PWM_VALUE$
 	//timer 0
-	OCR0A = 128;
+	OCR0A = 1;
 	OCR0B = 1;
 	//timer 1
 	OCR1B = 1;