changed to Phase corect pwm because of not achieving 0percent dtc
This commit is contained in:
parent
6306f8a8f9
commit
7ca98cc05e
8
main.c
8
main.c
@ -29,18 +29,18 @@ int main (void) { // (2)
|
|||||||
|
|
||||||
//#######OC0A auf ausgang
|
//#######OC0A auf ausgang
|
||||||
DDRB = (1 << PB0 )|(1<<PB1)|(1<<PB4);
|
DDRB = (1 << PB0 )|(1<<PB1)|(1<<PB4);
|
||||||
//#######Timer0-setup#####
|
//#######Timer0-setup##### |Phase correct pwm
|
||||||
TCCR0A = (1<<WGM01)|(1<<WGM00)|(1<<COM0A1)|(1<<COM0B1); //mode
|
TCCR0A = (1<<COM0A1)|(1<<COM0B1)|(1<<WGM00); //mode
|
||||||
TCCR0B = (1<<CS01);//|(1<<CS02); //frequency /8
|
TCCR0B = (1<<CS01);//|(1<<CS02); //frequency /8
|
||||||
// PLLCSR |= (1 << PLLE) | (1 << PCKE);
|
// PLLCSR |= (1 << PLLE) | (1 << PCKE);
|
||||||
//######Timer1-setup
|
//######Timer1-setup
|
||||||
|
|
||||||
TCCR1 = (1<<COM0A0)|(1<<COM0A1)|(1<<COM0B0)|(1<<COM0B1)|(1<<CTC1)|(1<<CS12)|(1<<CS10);//|(1<<CS11)|(1<<CS13); //frequencyi //iinverting PWM because 0 dtc not possible
|
TCCR1 = (1<<COM0A0)|(1<<COM0A1)|(1<<COM0B0)|(1<<COM0B1)|(1<<CTC1)|(1<<CS12)|(1<<CS10);//|(1<<CS11)|(1<<CS13); //frequencyi //iinverting PWM because 0 dtc not possible
|
||||||
GTCCR = (1<<PWM1B)|(1<<COM1B1)|(1<<COM1B0); //mode + overrun clear, Set on compare match
|
GTCCR = (1<<PWM1B)|(1<<COM1B0); //mode + overrun clear, Set on compare match
|
||||||
OCR1C = 255; // clear timer at 255
|
OCR1C = 255; // clear timer at 255
|
||||||
//######PWM_VALUE$
|
//######PWM_VALUE$
|
||||||
//timer 0
|
//timer 0
|
||||||
OCR0A = 128;
|
OCR0A = 1;
|
||||||
OCR0B = 1;
|
OCR0B = 1;
|
||||||
//timer 1
|
//timer 1
|
||||||
OCR1B = 1;
|
OCR1B = 1;
|
||||||
|
Loading…
Reference in New Issue
Block a user