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6 Commits

Author SHA1 Message Date
37274f93f7 Remove spaces, rearange tabs 2024-03-14 21:38:56 +00:00
32a72c84fc Remove spaces, rearange tabs 2024-03-14 21:37:51 +00:00
b79ebdd39d comlet rework 2024-03-06 20:39:47 +01:00
771f639fa3 comlet rework 2024-03-06 20:33:30 +01:00
a4db90ecf4 changed frequencies, suspect running 8 times slower than thought 2024-03-06 13:05:14 +01:00
0894b6aac5 attiny45 2024-03-06 12:28:34 +01:00
2 changed files with 118 additions and 123 deletions

153
main.c
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@ -1,9 +1,13 @@
//#pragma GCC push_options
//#pragma GCC optimize ("O0")
#define F_CPU 8000000UL
#include <util/delay.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/power.h>
#define PATTERN_COUNT 4
#define attiny45
typedef struct
{
@ -12,20 +16,20 @@ typedef struct
unsigned char b;
int time_hold;
}rgbval;
volatile uint16_t ms;
volatile int counts;
volatile uint16_t counts;
void InitTimer0(void);
void InitTimer1(void);
void setrgb(unsigned int r,unsigned int g, unsigned int b);
void InitInterrupts(void);
ISR(TIMER0_OVF_vect)
{
count();
}
void count(void)
{
//counts=0;//0..65535
counts++;
if(counts>=31)
if(counts>3) //1m //1ms
{
counts=0;
if(ms<60000)//1 minute
@ -37,73 +41,48 @@ void count(void)
ms=0;
}
}
}
int main (void) { // (2)
rgbval pattern[6][PATTERN_COUNT]={ {{0,0,0,10}, {0,0,0,10}, {0,0,0,10}, {0,0,0,10}},
ISR(TIMER0_OVF_vect)
{
count();
}
int main (void)
{
rgbval pattern[6][PATTERN_COUNT]={ {{0,0,0,100}, {0,0,0,100}, {0,0,0,100}, {0,0,0,100}},
{{1,1,1,10}, {1,1,153,20}, {200,50,39,10}, {204,255,153,20}},
{{1,1,1,10}, {10,255,0,10}, {1,1,255,20}, {1,200,1,20}},
{{1,50,50,10}, {10,255,0,10}, {80,200,0,20}, {200,200,1,20}},
{{1,1,5,10}, {1,1,255,10}, {1,1,5,10}, {1,1,255,10}},
{{252,102,3,10}, {161,67,47,10}, {118,120,74,10}, {83,120,74,20}},
{{87,119,122,10}, {95,87,122,10}, {52, 69, 56,10}, {83, 84, 72,10}}};
//rgbval *pattern=pattern1[0];
int i=0,i2=0,i3;
int i=0,i2=0,i3=0;
int r,g,b = 0;
int set=0;
int input=0;
uint16_t pre_delay=0;
ms =0;
counts = 0;
//disable prescaler
CLKPR = (1<<CLKPR);
CLKPR = 0x00;
// CLKPR = (1<<CLKPR); maybe optimization removes this
// CLKPR = 0x00;
clock_prescale_set(clock_div_1);//replaces above 2 lines
//#######OC0A auf ausgang
DDRB = (1 << PB0 )|(1<<PB1)|(1<<PB4);
cli();
//#######Timer0-setup##### |Phase correct pwm
TCCR0A = (1<<COM0A1)|(1<<COM0B1)|(1<<WGM00)|(1<<WGM00); //mode
TCCR0B = (1<<CS00)|(1<<CS00); //frequency /256 = 31250Hz , 1 t0 period = 8.192ms 1 increment = 0.032ms strangly prescaler of 1 results in expected results as prescaler was 256
// PLLCSR |= (1 << PLLE) | (1 << PCKE);
//######Timer1-setup
TCCR1 = (1<<COM1A0)|(1<<COM1A1)|(1<<CTC1)|(1<<CS12)|(1<<CS10);//|(1<<CS11)|(1<<CS13); //frequencyi //iinverting PWM because 0 dtc not possible
GTCCR = (1<<PWM1B)|(1<<COM1B0); //mode + overrun clear, Set on compare match
OCR1C = 255; // clear timer at 255
//######PWM_VALUE$
//timer 0
OCR0A = 1;
OCR0B = 1;
//timer 1
OCR1B = 1;
//######Configure Pullups
PORTB |= (1<<PB2);
//enable global interrupts
//Interupts
TIMSK |= (1<<TOIE0);//interrupt on overflow = one timer cycle
TIFR |= (1<<TOV0);
TCNT0 = 0;
sei();
DDRB = (1 << PB0 )|(1<<PB1)|(1<<PB4);//data directions - output
PORTB |= (1<<PB2); //pullups
cli(); //DISABLE Global Interrupts
InitTimer0();
InitTimer1();
InitInterrupts();
sei(); //ENABLE Global Interrupts
while(1)
{
for(i=1;i<PATTERN_COUNT;i++)
for(i=0;i<PATTERN_COUNT;i++)
{
r = pattern[i2][i].r;
g = pattern[i2][i].g;
b = pattern[i2][i].b;
if(i==(PATTERN_COUNT-1)) {i= -1;}
//reset timer counter
if(i==(PATTERN_COUNT-1)) {i= 0;}
while(1)
{
//input handling
input=PINB;
if(((input & (1<<PB2)) == 0 && set==0))
{
@ -114,50 +93,66 @@ sei();
{
i2=0;
}
//cycle through and stop pwm at value 0
//Visual feedback "mode change"
for(i3=0;i3<i2;i3++)
{
OCR0A=1;OCR0B=1;OCR1B=1;
_delay_ms(30);
OCR0A=255;OCR0B=255;OCR1B=255;
_delay_ms(30);
setrgb(0,0,0);
pre_delay = ms;
while((ms-pre_delay) < 200);
setrgb(0,200,0);
pre_delay = ms;
while((ms-pre_delay) < 200){};
}
}
else if(((input & (1<<PB2)) != 0))
{
set=0;
}
//Pattern handling
//iterate throught pattern to the next ones
if(r < pattern[i2][i+1].r) {r++;}
if(r > pattern[i2][i+1].r) {r--;}
if(g < pattern[i2][i+1].g) {g++;}
if(g > pattern[i2][i+1].g) {g--;}
if(b < pattern[i2][i+1].b) {b++;}
if(b > pattern[i2][i+1].b) {b--;}
OCR0A = g;//green
OCR0B = r;//red
OCR1B = b;//blue
// :wq
// _delay_ms(10);
pre_delay = ms;
// :wq
while((ms-pre_delay) < pattern[i2][i+1].time_hold){};
setrgb(r,g,b);
//read timer evaluate time since read in 1ms steps
//pre_delay = ms;
//while((ms-pre_delay) <1000);
_delay_ms(30);
if(r == pattern[i2][i+1].r && g == pattern[i2][i+1].g && b == pattern[i2][i+1].b) break;
}
}
}
return 0;
}
void InitTimer0(void)
{
//#######Timer0-setup##### |Phase correct pwm
TCCR0A = (2<<COM0A0)|(2<<COM0B0)|(1<<WGM00)|(1<<WGM01); //mode fast pwm (1/Fcpu)*prescaler*(max+1) =
//prescaler /64 gives 0...255 0.002048s = 2.0ms 1mhz-> /8
TCCR0B = (1<<CS01);//|(1<<CS01)/256;
}
void InitTimer1(void)
{
//######Timer1-setup
PLLCSR &= ~(1<<PCKE);
TCCR1 = (1<<COM1A0)|(1<<COM1A1)|(1<<CS12)|(1<<CS10)|(1<<CS11);//(1<<CS10)|(1<<CS12);//|(1<<CS13); //frequencyi //inverting PWM because 0 dtc not possible
GTCCR = (1<<PWM1B)|(1<<COM1B1); //mode + overrun clear, Set on compare match
OCR1C = 255; // clear timer at 255
}
void setrgb(unsigned int r,unsigned int g,unsigned int b)
{
//depends on timer0
OCR0A = g;//green
OCR0B = r;//red
//depends on Timer1
OCR1B = b;//blue
}
void InitInterrupts(void)
{
TIMSK |= (1<<TOIE0);//interrupt on overflow = one timer cycle
TIFR |= (1<<TOV0);
TCNT0 = 0;
}
//#pragma GCC pop_options

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@ -5,12 +5,12 @@
# (GNU make, BSD make, SysV make)
MCU = attiny85
MCU = attiny45
FORMAT = ihex
TARGET = main
SRC = $(TARGET).c
ASRC =
OPT = s
OPT = 0
# Name of this Makefile (used for "make depend").
MAKEFILE = Makefile